1. Field of the Invention
The present invention generally relates to a an electroless plating system.
2. Description of the Related Art
Sub-quarter micron multilevel metallization is a key technology for the next generation of very large scale integration (VLSI) and ultra large scale integration (ULSI). The multilevel interconnects that lie at the heart of these integration technologies possess high aspect ratio features, including contacts, vias, lines, plugs, and other features. Therefore, reliable formation of these features is critical to the success of VLSI and ULSI, as well as to the continued effort to increase integrated circuit density, quality, and reliability on individual substrates. As such, there is a substantial amount of ongoing effort being directed to improving the formation of void-free sub-quarter micron features having high aspect ratios, i.e., features having a height to width ratio of about 4:1 or greater.
Elemental aluminum (Al) and aluminum alloys have conventionally been used as conductive materials to form lines, plugs, and other features in integrated circuit semiconductor processing techniques, as a result of aluminum""s low resistivity, superior adhesion to silicon dioxide (SiO2) substrates, ease of patterning, and relatively high purity available at moderate costs. Aluminum, however, suffers from a relatively high resistivity, as well as poor electromigration characteristics. Therefore, and as the width of electrical interconnections becomes narrower, i.e., into the sub-quarter micron range, the resistance and electromigration characteristics of aluminum has an increasingly negative affect upon the resistance-capacitance (RC) time delay characteristics of the integrated circuits formed using aluminum interconnect features. As a result of the disadvantages of aluminum, copper and copper alloys have recently become choice metals for filling sub-quarter micron high aspect ratio interconnect features in integrated circuits, as copper and copper alloys have a lower resistivity than aluminum, and therefore, generate RC circuits having better time delay characteristics.
However, a problem with using copper in integrated circuit fabrication is that copper is not easily deposited into high aspect ratio features with conventional semiconductor processing techniques. For example, physical vapor deposition (PVD) techniques may be used to deposit copper, however, PVD copper deposition is known to encounter difficulty in obtaining adequate bottom fill in high aspect ratio features. Additionally, chemical vapor deposition (CVD) may be used to deposit copper, however, CVD suffers from low deposition rates, and therefore low throughput, in addition to using precursors that are generally unstable.
Therefore, there exists a need for an apparatus for reliably depositing copper into high aspect ratio features of integrated circuits.
Embodiments of the invention generally provide a method and apparatus for plating substrates. An exemplary plating apparatus of the invention includes a central substrate transfer enclosure having at least one substrate transfer robot positioned therein. A substrate activation chamber in communication with the central substrate transfer enclosure is provided and is accessible to the at least one substrate transfer robot. A substrate plating chamber in communication with the central substrate transfer enclosure is provided and is accessible to the at least one substrate transfer robot. A substrate spin rinse dry chamber in communication with the central substrate transfer enclosure is provided and is accessible to the at least one substrate transfer robot, and an annealing chamber in communication with the central substrate transfer enclosure is provided and is accessible to the at least one substrate transfer robot. At least one substrate pod loader in communication with the substrate transfer chamber and accessible to the at least one substrate transfer robot is also provided.
Embodiments of the invention further provide a semiconductor plating system that includes a central transfer enclosure, a first substrate transfer robot positioned in a first region of the substrate transfer enclosure, and a second substrate transfer robot positioned in a second region of the substrate transfer enclosure. A first substrate pod loader in communication with the first region of the substrate transfer enclosure is provided, and a second substrate pod loader in communication with the second region of the substrate transfer enclosure is also provided. An activation enclosure in communication with the first region of the substrate transfer enclosure is provided and a substrate plating enclosure in communication with the first region of the substrate transfer enclosure is provided. A substrate spin rinse dry enclosure in communication with the second region of the substrate transfer enclosure is provided and a substrate annealing enclosure in communication with the second region of the substrate transfer enclosure is provided. A substrate handoff is provided and is positioned in the substrate transfer enclosure and in communication with the first region and the second region.
Embodiments of the invention further provide a method for plating a metal on a substrate, wherein the method includes the steps of retrieving a substrate from a first pod loader position with a first substrate transfer robot positioned in a substrate transfer enclosure and transferring the substrate to an activation chamber in communication with the substrate transfer enclosure for an activation process with the first substrate transfer robot. The method further includes removing the substrate from the activation chamber with the first substrate transfer robot and transferring the substrate to a plating enclosure in communication with the substrate transfer enclosure for a plating process, and then removing the substrate from the plating enclosure with the first substrate transfer robot and positioning the substrate on a handoff position in the substrate transfer enclosure. The method further includes retrieving the substrate from the handoff position with a second substrate transfer robot positioned in the substrate transfer enclosure and transferring the substrate to a spin rinse dry enclosure in communication with the substrate transfer enclosure for a rinse and dry process, and removing the substrate from the spin rinse dry enclosure with the second robot and transferring the substrate to an annealing chamber in communication with the substrate transfer enclosure for an annealing process. Once the annealing process is complete, the method includes the step of transferring the substrate to a second pod loader in communication with the substrate transfer enclosure with the second substrate transfer robot.